arXiv:2605. 21810v1 Announce Type: new Abstract: Complex Verilog Design Problems (CVDP) challenge hardware LLM agents because solving them requires localizing verifier-relevant RTL, testbenches, include paths, and build dependencies inside large repository snapshots, making precise edits, and recovering from sparse hidden-verifier failures.
Paper
Trace2Skill: Verifier-Guided Skill Evolution for Long-Context EDA Agents
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